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    高精度DAC

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    Resolution(bit): 12 14 16
    CH: 1 4 8
    INL(LSB, Max): ±1 ±2 ±8 ±16
    Package: 8-Pin MSOP 16-Pin TSSOP 16-Pin QFN
    Status

    New Product

    Production

    Not Recommended in New Design

    Resolution(bit)

    12

    14

    16

    VDD (V)

    2.7~5.5

    CH

    1

    4

    8

    INL(LSB, Max)

    ±1

    ±2

    ±8

    ±16

    DNL(LSB, Max)

    ±1

    Offset Error(mV,Max)

    ±30

    IDD(uA/CH,Max)

    80μΑ

    Gain Error(% of FSR, Max)

    ±0.3

    Voltage Output Range(V)

    0~Vef

    D to A Glitch Impulse(nV-sec)

    2

    Temp Range(℃)

    -40~125

    Package

    8-Pin MSOP

    16-Pin TSSOP

    16-Pin QFN

    共8條數據

    Down

    Part Number Status Resolution(bit) VDD (V) CH INL(LSB, Max) DNL(LSB, Max) Offset Error(mV,Max) IDD(uA/CH,Max) Gain Error(% of FSR, Max) Voltage Output Range(V) D to A Glitch Impulse(nV-sec) Temp Range(℃) Package
    Part Number Status Resolution(bit) VDD (V) CH INL(LSB, Max) DNL(LSB, Max) Offset Error(mV,Max) IDD(uA/CH,Max) Gain Error(% of FSR, Max) Voltage Output Range(V) D to A Glitch Impulse(nV-sec) Temp Range(℃) Package
    TPC116S8 Production 16 2.7~5.5 8 ±16 ±1 ±30 80μΑ ±0.3 0~Vef 2 -40~125 16-Pin TSSOP
    16-Pin QFN
    TPC112S8 Production 12 2.7~5.5 8 ±2 ±1 ±30 80μΑ ±0.3 0~Vef 2 -40~125 16-Pin TSSOP
    16-Pin QFN
    TPC112S8U Production 12 2.7~5.5 8 ±2 ±1 ±30 80μΑ ±0.3 0~Vef 2 -40~125 16-Pin TSSOP
    16-Pin QFN
    TPC116S4 Production 16 2.7~5.5 4 ±16 ±1 ±30 80μΑ ±0.3 0~Vef 2 -40~125 16-Pin TSSOP
    TPC112S4 Production 12 2.7~5.5 4 ±2 ±1 ±30 80μΑ ±0.3 0~Vef 2 -40~125 16-Pin TSSOP
    TPC116S1 Production 16 2.7~5.5 1 ±16 ±1 ±30 80μΑ ±0.3 0~Vef 2 -40~125 8-Pin MSOP
    TPC114S1 Production 14 2.7~5.5 1 ±8 ±1 ±30 80μΑ ±0.3 0~Vef 2 -40~125 8-Pin MSOP
    TPC112S1 Production 12 2.7~5.5 1 ±2 ±1 ±30 80μΑ ±0.3 0~Vef 2 -40~125 8-Pin MSOP
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